Selection · Engineering guide
Embedded Memory & Storage Selection Guide
Choose DDR, LPDDR, eMMC, SPI NOR or NAND from processor support, workload, boot requirements and lifecycle constraints.
How do I choose DDR, LPDDR, eMMC or SPI NOR?
Choose DRAM for working memory and flash for persistent storage. First check processor interface and boot support; then measure RAM, bandwidth, storage footprint and write workload. eMMC capacity cannot replace a shortage of runtime RAM.
Choose the interface first
| Type | Typical role | Check before selection |
|---|---|---|
| DDR / LPDDR | Runtime memory for the OS, graphics and application | Controller and PHY support, organization, voltage, bandwidth, package and board layout |
| eMMC | Managed boot and application storage | Boot ROM support, bus mode, endurance, firmware, power-loss behavior and lifecycle |
| SPI NOR | Boot firmware, configuration or execute-in-place code | Boot commands, address mode, erase geometry, read mode and retention |
| Raw / SPI NAND | Higher-capacity flash with host-managed constraints | ECC requirements, bad-block handling, boot support and software stack |
Size from the real workload
Measure peak RAM use with the production display buffers, application, services and update process running. Reserve space for expected software growth. Check memory bandwidth under concurrent display, GPU, camera and CPU traffic; capacity alone does not establish performance.
For storage, include the boot chain, root filesystem, update slots, recovery image and logs. Estimate daily writes and retention at the operating temperature. Keep GB of usable capacity separate from Gb of DRAM density. For an LVGL interface, use the LVGL memory estimator for an initial buffer budget, then measure the application on hardware.
Capacity units and display buffers
A bit and a byte are not interchangeable: eight bits make one byte. Convert a DRAM density using the bit count and organization in its datasheet. For storage, 1 GB = 1,000,000,000 bytes, while 1 GiB = 1,073,741,824 bytes. A nominal 32 GB device is about 29.8 GiB before partitions and filesystem overhead. See NIST’s binary-prefix definitions.
| Allocation | Calculation | Memory |
|---|---|---|
| One frame | 800 × 480 × 2 bytes | 768,000 bytes = 750 KiB |
| Two frames | 768,000 × 2 | 1,536,000 bytes ≈ 1.46 MiB |
This is a buffer calculation, not total application RAM. Add stride alignment, draw buffers, image caches, fonts, heap, stacks and the OS. Partial rendering changes the draw-buffer allocation; it does not automatically remove the display controller’s framebuffer requirement. Use the LVGL memory estimator for a first budget.
Release checklist
- Exact processor, package, silicon revision and supported memory interface.
- Full memory part number, density, width, ranks, package and temperature grade.
- Power rails, sequencing, layout constraints and bootloader configuration.
- Measured RAM peak, storage footprint, write workload and update policy.
- Board-level training, stress, temperature, cold-start and power-cycle results.
- Supply duration, PCN/EOL terms, traceability and an alternative-part plan.
Use the Embedded Memory Design-in Checklist to record the inputs. For NXP designs, continue with the i.MX compatibility guide. For flash replacement, use the eMMC review checklist.
References and scope
- NXP i.MX Memory Fact Sheet — Processor interface overview for NXP designs; other platforms require their own controller documentation.
References checked 25 October 2026. The test and release checklists are OpenHMI engineering guidance; they are not supplier certification.
Common questions
Is more memory always the safer choice?
No. Capacity must fit the processor organization and board design. Extra capacity does not fix bandwidth, boot compatibility or endurance limits.
Is 8 Gb of memory the same as 8 GB?
No. Lowercase b denotes bits and uppercase B denotes bytes; eight bits make one byte. Confirm the datasheet’s density convention and organization before converting a part’s advertised capacity.